Avec IP Paris, département IDIA intitulée:

 « Contributions to model based test generation and monitoring strategies and their networking applications ».

Date : le jeudi 15 septembre 2022, 10h30 ;
Lieu : IMT, 19 place Marguerite Perey, Palaiseau, Amphi 6

Composition du Jury :
Rob Hierons, Professor, University of Sheffield, Rapporteur
Pascale Le Gall, Professeur, CentraleSupélec, Rapporteur
Franz Wotawa, Professor, Graz University of Technology, Rapporteur
Roland Groz, Professeur, Grenoble INP UGA, Examinateur
Burkhart Wolff, Professeur, Université Paris-Saclay, Examinateur
Tiziano Villa, Professor, University of Verona, Examinateur
Djamal Zeghlache, Professeur, Télécom SudParis, Examinateur

Résumé :
The work presents a number of contributions in the area of model based testing (MBT), on the one hand, and some MBT applications, on the other hand. MBT generally relies on a formal specification of the system under test that later on allows to assure that its implementation conforms to the specification (or not). In our case, we mostly focus on the analysis of reactive systems, i.e., the systems working in request-response mode and moreover the behavior of these systems is sequential. Therefore, we mostly study transition or state models that change their states when an input is applied and/or an output is produced. Application areas of this work mostly cover networks and in particular dynamic and programmable networks whose components need to be thoroughly tested and verified. At the same time, as the behavior of reactive systems is not only sequential but also (highly) nondeterministic, we pay additional attention to the methods and techniques developed for testing (with the guaranteed fault coverage) and monitoring against nondeterministic and probably non-observable specifications. We discuss the problems that appear in the latter case and draw a particular attention to the state identification issues in nondeterministic specifications. We present the current state of the art in the area of state identification and propose original solutions for some Finite State Machine (FSM)/Automata classes with the complexity estimation. Note that some particular network components can also have rather a combinational behavior, such as for example, forwarding devices, and thus we also draw our attention to the logic circuit based testing and related fault models. At the same time, sequential circuits can be considered as scalable representations for FSMs and thus, we also consider testing against sequential circuits. Note that some of the contributions of this work remain purely fundamental and we still do not have interesting case studies for the specifications in question, however, for some others we discuss their applications in the area of network management. Moreover, for particular « network-driven » test purposes, we discuss other – sometimes simpler – testing and verification possibilities that allow under certain assumptions, assure the correct functioning of network components.

La soutenance sera suivie par un petit pot dans la salle 4A301.