pr\u00e9sentent<\/p>\n\n\n\n
Autoris\u00e9 \u00e0 pr\u00e9senter ses travaux en vue de l\u2019obtention du Doctorat de l’Institut Polytechnique de Paris, pr\u00e9par\u00e9 \u00e0 T\u00e9l\u00e9com SudParis en :<\/p>\n\n\n\n
le LUNDI 18 D\u00c9CEMBRE 2023 \u00e0 15h00
\u00e0
Laboratoire d’Informatique
Rue Emile-Argand 11 2000 Neuch\u00e2tel SUISSE<\/p>\n\n\n\n
Membres du jury :<\/strong><\/p>\n\n\n\n M. Ga\u00ebl THOMAS<\/strong>, Directeur de recherche, T\u00e9l\u00e9com SudParis, FRANCE – CoDirecteur de these R\u00e9sum\u00e9 :<\/strong><\/p>\n\n\n\n Les ordinateurs modernes sont construits autour de deux \u00e9l\u00e9ments : leur CPU et leur m\u00e9moire principale volatile, ou RAM. Depuis les ann\u00e9es 1970, ce principe a \u00e9t\u00e9 constamment am\u00e9lior\u00e9 pour offrir toujours plus de fonctionnalit\u00e9s et de performances. Dans cette th\u00e8se, nous \u00e9tudions deux paradigmes de m\u00e9moire qui proposent de nouvelles fa\u00e7ons d\u2019interagir avec la m\u00e9moire dans les syst\u00e8mes modernes : la m\u00e9moire non-volatile et les acc\u00e8s m\u00e9moire distants. Nous mettons en \u0153uvre des outils logiciels qui exploitent ces nouvelles approches afin de les rendre compatibles et d\u2019exploiter leurs performances avec des applications concr\u00e8tes. Nous analysons \u00e9galement l\u2019impact des technologies utilis\u00e9es, et les perspectives de leur \u00e9volution dans les ann\u00e9es \u00e0 venir. Pour la m\u00e9moire non-volatile, comme les performances de la m\u00e9moire sont essentielles pour atteindre le potentiel d\u2019un CPU, cette fonctionnalit\u00e9 a historiquement \u00e9t\u00e9 abandonn\u00e9e. M\u00eame si les premiers ordinateurs ont \u00e9t\u00e9 con\u00e7us avec des formes de m\u00e9moire non volatiles, les architectes informatiques ont commenc\u00e9 \u00e0 utiliser la RAM volatile pour ses performances in\u00e9gal\u00e9es, et n\u2019ont jamais remis en question cette d\u00e9cision pendant des ann\u00e9es. Cependant, en 2019, Intel a commercialis\u00e9 un nouveau composant appel\u00e9 Optane DCPMM qui rend possible l\u2019utilisation de NVMM. Ce produit propose une nouvelle fa\u00e7on de penser la persistance des donn\u00e9es. Mais il remet \u00e9galement en question l\u2019architecture de nos machines et la mani\u00e8re dont nous les programmons. Avec cette nouvelle forme de m\u00e9moire, nous avons impl\u00e9ment\u00e9 NVCACHE, un cache en m\u00e9moire non-volatile qui permet d\u2019acc\u00e9l\u00e9rer les interactions avec des supports de stockage persistants plus lents, tels que les SSD. Nous montrons que NVCACHE est particuli\u00e8rement performant pour les t\u00e2ches qui n\u00e9cessitent une granularit\u00e9 \u00e9lev\u00e9e des garanties de persistance, tout en \u00e9tant aussi simple \u00e0 utiliser que l\u2019interface POSIX traditionnelle. Compar\u00e9 aux syst\u00e8mes de fichiers con\u00e7us pour NVMM, NVCACHE peut atteindre un d\u00e9bit similaire ou sup\u00e9rieur lorsque la m\u00e9moire non volatile est utilis\u00e9e. De plus, NVCACHE permet aux programmes d\u2019exploiter les performances de NVMM sans \u00eatre limit\u00e9 par la quantit\u00e9 de NVMM install\u00e9e sur la machine. Un autre changement majeur dans le paysage informatique a \u00e9t\u00e9 la popularit\u00e9 des syst\u00e8mes distribu\u00e9s. Alors que les machines ont individuellement tendance \u00e0 atteindre des limites de performances, l\u2019utilisation de plusieurs machines et le partage des t\u00e2ches sont devenus la nouvelle fa\u00e7on de cr\u00e9er des ordinateurs puissants. Bien que ce mode de calcul permette d\u2019augmenter le nombre de CPU utilis\u00e9s simultan\u00e9ment, il n\u00e9cessite une connexion rapide entre les n\u0153uds de calcul. Pour cette raison, plusieurs protocoles de communication ont impl\u00e9mentent\u00e9 RDMA, un moyen de lire ou d\u2019\u00e9crire directement dans la m\u00e9moire d\u2019un serveur distant. RDMA offre de faibles latences et un d\u00e9bit \u00e9lev\u00e9, contournant de nombreuses \u00e9tapes de la pile r\u00e9seau. Cependant, RDMA reste limit\u00e9 dans ses fonctionnalit\u00e9s natives. Par exemple, il n\u2019existe pas d\u2019\u00e9quivalent de multicast pour les fonctions RDMA les plus efficaces. Gr\u00e2ce \u00e0 un switch programmable (le switch Intel Tofino), nous avons impl\u00e9ment\u00e9 un mode sp\u00e9cial pour RDMA qui permet de lire ou d\u2019\u00e9crire sur plusieurs serveurs en m\u00eame temps, sans p\u00e9nalit\u00e9 de performances. Notre syst\u00e8me appel\u00e9 Byp4ss fait participer le switch aux transferts, en dupliquant les paquets RDMA. Gr\u00e2ce \u00e0 Byp4ss, nous avons impl\u00e9ment\u00e9 un protocole de consensus nomm\u00e9 DISMU. De par sa conception, DISMU est optimal en termes de latence et de d\u00e9bit, car il peut r\u00e9duire au minimum le nombre de paquets \u00e9chang\u00e9s sur le r\u00e9seau pour parvenir \u00e0 un consensus. Enfin, en utilisant ces deux technologies, nous remarquons que les futures g\u00e9n\u00e9rations de mat\u00e9riel pourraient n\u00e9cessiter une nouvelle interface pour les m\u00e9moires de toutes sortes, afin de faciliter l\u2019interop\u00e9rabilit\u00e9 dans des syst\u00e8mes qui ont tendance \u00e0 devenir de plus en plus h\u00e9t\u00e9rog\u00e8nes et complexes. Modern computers are built around two main parts: their Central Processing Unit (CPU), and their volatile main memory, or Random Access Memory (RAM). The basis of this architecture takes its roots in the 1970\u2019s first computers. Since, this principle has been constantly upgraded to provide more functionnality and performance. In this thesis, we study two memory paradigms that drastically change the way we can interact with memory in modern systems: non-volatile memory and remote memory access. We implement software tools that leverage them in order to make them compatible and exploit their performance with concrete applications. We also analyze the impact of the technologies underlying these new memory medium, and the perspectives of their evolution in the coming years. For non-volatile memory, as the main memory performance is key to unlock the full potential of a CPU, this feature has historically been abandoned on the race for performance. Even if the first computers were designed with non-volatile forms of memory, computer architects started to use volatile RAM for its incomparable performance compared to durable storage, and never questioned this decision for years. However, in 2019 Intel released a new component called Optane DC Persistent Memory (DCPMM), a device that made possible the use of Non-Volatile Main Memory (NVMM). That product, by its capabilities, provides a new way of thinking about data persistence. Yet, it also challenges the hardware architecture used in our current machines and the way we program them. With this new form of memory we implemented NVCACHE, a cache designed for non-volatile memory that helps boosting the interactions with slower persistent storage medias, such as solid state drive (SSD). We find NVCACHE to be quite performant for workloads that require a high granularity of persistence guarantees, while being as easy to use as the traditional POSIX interface. Compared to file systems designed for NVMM, NVCACHE can reach similar or higher throughput when the non-volatile memory is used. In addition, NVCACHE allows the code to exploit NVMM performance while not being limited by the amount of NVMM installed in the machine. Another major change of in the computer landscape has been the popularity of distributed systems. As individual machines tend to reach performance limitations, using several machines and sharing workloads became the new way to build powerful computers. While this mode of computation allows the software to scale up the number of CPUs used simultaneously, it requires fast interconnection between the computing nodes. For that reason, several communication protocols implemented Remote Direct Memory Access (RDMA), a way to read or write directly into a distant machine\u2019s memory. RDMA provides low latencies and high throughput, bypassing many steps of the traditional network stack. However, RDMA remains limited in its native features. For instance, there is no advanced multicast equivalent for the most efficient RDMA functions. Thanks to a programmable switch (the Intel Tofino), we implemented a special mode for RDMA that allows a client to read or write in multiple servers at the same time, with no performance penalty. Our system called Byp4ss makes the switch participate in transfers, duplicating RDMA packets. On top of Byp4ss, we implement a consensus protocol named DISMU, which shows the typical use of Byp4ss features and its impact on performance. By design, DISMU is optimal in terms of latency and throughput, as it can reduce to the minimum the number of packets exchanged through the network to reach a consensus. Finally, by using these two technologies, we notice that future generations of hardware may require a new interface for memories of all kinds, in order to ease the interoperability in systems that tend to get more and more heterogeneous and complex.<\/p>\n","protected":false},"excerpt":{"rendered":" L’Ecole doctorale : Ecole Doctorale de l’Institut Polytechnique de Paris et le Laboratoire de recherche SAMOVAR – Services r\u00e9partis, Architectures, Mod\u00e9lisation, Validation, Administration des R\u00e9seaux pr\u00e9sentent l\u2019AVIS DE SOUTENANCE de Monsieur R\u00e9mi DULONG Autoris\u00e9 \u00e0 pr\u00e9senter ses travaux en vue de l\u2019obtention du Doctorat de l’Institut Polytechnique de Paris, pr\u00e9par\u00e9 \u00e0 T\u00e9l\u00e9com SudParis en : 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Mme Anne-Marie KERMARREC<\/strong>, Directrice de recherche, EPFL, SUISSE – Rapporteur
M. Patrick EUGSTER<\/strong>, Professeur, USI, SUISSE – Examinateur
M. Noel DE PALMA<\/strong>, Professeur, Universit\u00e9 Grenoble Alpes, FRANCE – Rapporteur
M. Thomas CLAUSEN<\/strong>, Professeur, IP Paris, FRANCE – Examinateur
M. Pascal FELBER<\/strong>, Directeur de recherche, UNINE, SUISSE – CoDirecteur de these
<\/p>\n\n\n\n\u00ab Vers de nouveaux paradigmes m\u00e9moire: Int\u00e9gration de m\u00e9moire principale non-volatile et d’acc\u00e8s direct de m\u00e9moire distante dans les syst\u00e8mes modernes \u00bb<\/h2>\n\n\n\n
pr\u00e9sent\u00e9 par Monsieur R\u00e9mi DULONG<\/h2>\n\n\n\n
Abstract :<\/strong><\/p>\n\n\n\n